About us
At the Nano Devices and Application Lab, we specialize in the cutting-edge research and development of semiconductor devices. Our team leverages advanced machine learning techniques to enhance device modeling, pushing the boundaries of technology in transistors, ferroelectrics, and memory devices.
Semiconductor Device Modeling
Utilizing advanced computational methods to accurately simulate and predict the behavior of semiconductor devices.
Machine Learning-Based Device Modeling
Applying machine learning algorithms to optimize and innovate semiconductor device performance and design.
Quantum Transport Simulations
Implementing machine learning techniques to model and simulate quantum transport phenomena in nanoscale devices.
Resistive Random-Access Memory (RRAM)
Investigating the development and optimization of RRAM for high-density, low-power memory applications.
Electrostatic Discharge (ESD) Protection
Designing and optimizing ESD protection mechanisms to ensure the reliability and longevity of semiconductor devices.
Negative Capacitance Field-Effect Transistors (NCFETs)
Researching and developing NCFETs to achieve lower power consumption and enhanced performance in future electronic devices.
People
Faculty

Prof. Harshit Agarwal
Associate ProfessorPh.D. Students

Anant Singhal
Machine Learning Driven Semiconductor Device Modeling
Anurag Dwivedi
Flexible Resistive Memory Devices for Eco-friendly Electronics: Fabrication, Modeling, and Circuit Implementation
Garima Gill
Compact Modeling of High Voltage MOSFETs and it's Safe Operating Analysis
Madhuram Mishra
Modeling of Resistive Random Access Memory
Yogendra Machhiwar
Reconfigurable FETs for Future ElectronicsM.Tech. Students

Abhishek Kumar
Highly Reliable and Energy Efficient, Radiation Hardened 12T SRAM Cell Design
Ambrish Kumar Mishra
Modeling of Schottky contact based MOSFET
Danish Raja
Ferroelectric Devices for Advanced ComputingKarunesh Kumar Tripathi
AlGaN/GaN Fin-HEMTs
Harshita Singh
HSPICE simulation of memory crossbar using RRAM for neuromorphic circuitsSponsored Projects
S. No. | Title | Funding Agency | Duration | Amount | Principal Investigator (PI) | Co-Principal Investigator (Co-PI) |
---|---|---|---|---|---|---|
1. | Compact Modeling and Simulations of Nano-Scale Devices | IIT Jodhpur | 2020-2023 | Rs. 25 lakhs | Prof. Harshit Agarwal | - |
2. | Gate All Around Steep Slope Transistors | DST | 2021-2024 | Rs. 45 lakhs | Prof. Harshit Agarwal | - |
3. | Unified Modeling and Design of High Voltage Transistors | SERB | 2021-2023 | Rs. 33 lakhs | Prof. Harshit Agarwal | - |
Collaborations






Announcements
Coming Soon
- IEEE EDS Summer School organized by IEEE EDS Student Branch Chapter, IIT Jodhpur co-sponsored by Nano Devices and Application Lab..
Publications
2024
- A. Singhal, G. Gill, A. Lahgere, G. Pahwa, and H. Agarwal, "Improved Compact Modeling of Snapback Behaviour in ESD MOSFETs," IEEE SISPAD 2024 (Accepted).
- Y. Machhiwar, P.Kushwaha, and H. Agarwal, "Optimization of source/drain-epi region height in GAA Nanosheet FET for RF application", in IEEE DRC 2024 (Accepted).
- A. Singhal, P. Goyal and H. Agarwal, "Artificial Neural Network Driven Optimization for Analog Circuit Performance," 2024 IEEE Latin American Electron Devices Conference (LAEDC), Guatemala City, Guatemala, 2024, pp. 1-4, doi: 10.1109/LAEDC61552.2024.10555739.
- A. Singhal and H. Agarwal, "Physics Informed Neural Network Based Time-Independent Schrödinger Equation Solver," 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), Bangalore, India, 2024, pp. 1-3, doi: 10.1109/EDTM58488.2024.10512058.
- A. Singhal, G. Pahwa and H. Agarwal, "A Novel Physics Aware ANN-Based Framework for BSIM-CMG Model Parameter Extraction," in IEEE Transactions on Electron Devices, vol. 71, no. 5, pp. 3307-3314, May 2024, doi: 10.1109/TED.2024.3381917.
- A. Dwivedi, S. Saini, A. Lodhi, H. Agarwal, and S. P. Tiwari, ”Flexible resistive memory device with egg-albumen/HfOx hybrid bilayer: fabrication and modeling of its switching variations,” in Flexible and Printed Electronics, vol. 9, no. 2, pp. 025004, April 2024, doi:10.1088/2058-8585/ad39fa.
- Y. Machhiwar, G. Gill, K. N. Kaushal, N. R. Mohapatra and H. Agarwal, "Compact Modeling of LDMOS Transistors Over a Wide Temperature Range Including Cryogenics," in IEEE Transactions on Electron Devices, vol. 71, no. 1, pp. 77-83, Jan. 2024, doi: 10.1109/TED.2023.3326107.
- G. Gill, Y. Machhiwar, G. Pahwa, C. Hu and H. Agarwal, "Comprehensive High-Voltage Parameter Extraction Strategy for BSIM-BULK HV Model," in IEEE Transactions on Electron Devices, vol. 71, no. 1, pp. 70-76, Jan. 2024, doi: 10.1109/TED.2023.3257121.
2023
- Y. Machhiwar, N. Chauhan and H. Agarwal, "Impact of Ferroelectric Polarization Gradient and Viscosity Coefficient on Performance of Negative Capacitance FET Circuits," 2023 IEEE 20th India Council International Conference (INDICON), Hyderabad, India, 2023, pp. 679-683, doi: 10.1109/INDICON59947.2023.10440816.
- G. Gill, A. Singhal, G. Pahwa, C. Hu and H. Agarwal, "Compact Modeling of Impact Ionization in High-Voltage Devices," in IEEE Transactions on Electron Devices, vol. 70, no. 5, pp. 2389-2394, May 2023, doi: 10.1109/TED.2023.3253101.
- A. Singhal, G. Gill, G. Pahwa, C. Hu and H. Agarwal, "An Improved Robust Infinitely Differentiable Drift Resistance Model for BSIM High Voltage Compact Model," 2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), Seoul, Korea, Republic of, 2023, pp. 1-3, doi: 10.1109/EDTM55494.2023.10103122.
- A. Dwivedi, A. Lodhi, S. Saini, H. Agarwal and S. P. Tiwari, ”Albumen Based Flexible Memory Device for Bio-Sustainable Electronics,” 2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), Seoul, Korea, Republic of, 2023, pp. 1-3, doi: 10.1109/EDTM55494.2023.10102986.
2022
- A. Singhal, Y. Machhiwar and H. Agarwal, "Role of Negative Differential Resistance in Improving Analog Performance of Negative Capacitance FETs," 2022 IEEE International Conference on Emerging Electronics (ICEE), Bangalore, India, 2022, pp. 1-6, doi: 10.1109/ICEE56203.2022.10117913.
- A. Dwivedi, S. Saini, A. Lodhi, H. Agarwal, and S. P. Tiwari, ”Effect of Temperature Induced Phase Variation in ALD TiO2 Dielectric on the Switching Behaviour of RRAM Devices,” 2022 IEEE International Conference on Emerging Electronics (ICEE), Bangalore, India, 2022, pp. 1-4, doi: 10.1109/ICEE56203.2022.10117866.
- A. Dwivedi, A. Lodhi, S. Saini, H. Agarwal, and S. P. Tiwari, ”Fabrication and Modeling of Flexible High-Performance Resistive Switching Devices With Biomaterial Gelatin/Ultrathin HfOx Hybrid Bilayer,” in IEEE Transactions on Electron Devices, vol. 69, no. 11, pp. 6423-6429, Nov. 2022, doi: 10.1109/TED.2022.3206255.
- A. Dwivedi, A. Lodhi, S. Saini, H. Agarwal, and S. Prakash Tiwari, ”Flexible RRAM with Natural Gelatin Exhibiting High Current On/Off Ratio and Retention,” 2022 IEEE International Flexible Electronics Technology Conference (IFETC), Qingdao, China, 2022, pp. 1-2, doi: 10.1109/IFETC53656.2022.9948508.
Contact
Reach out to us
Address
Nano Devices and Application Lab
Indian Institute of Technology Jodhpur
Rajasthan - 342030, India
Email Us
nanodevicesandapplab@gmail.com
Call Us
+91 8630 1177 09